Digital Electronic – Programmerbay https://programmerbay.com A Tech Bay for Tech Savvy Sun, 10 Mar 2024 16:45:18 +0000 en-US hourly 1 https://wordpress.org/?v=6.5.5 https://programmerbay.com/wp-content/uploads/2019/09/cropped-without-transparent-32x32.jpg Digital Electronic – Programmerbay https://programmerbay.com 32 32 Design 2 bit synchronous up down counter using T flip flop? https://programmerbay.com/design-2-bit-synchronous-up-down-counter-using-t-flip-flop/ https://programmerbay.com/design-2-bit-synchronous-up-down-counter-using-t-flip-flop/#respond Fri, 01 Mar 2024 17:29:00 +0000 http://programmerbay.com/?p=3111

These are the following steps to design 2 bit synchronous up down counter using T flip flop:

Step 1: To design a synchronous up-down counter, we need one extra input called control input. Other than this, in next state column, half of the input must be appeared as up counter and the remaining must be treated as a down counter.

Step 2: After that, we need to construct a state table with excitation table.

Note: To construct excitation table from state table you should know the excitation table of respective flip flop, in this case, it is T flip flop. So check the excitation table for T flip flop Which is:

T Flip Flop Excitation Table

Present stateNext State    T
000
011
101
110

So, the above table is the excitation table for T Flip Flop.


State Table with  excitation  table

   Control input   Present State    Next State    Flip Flop
CiQ2Q1Q'2Q'1T2T1
0000101
0011011
0101101
0110011
1001111
1010001
1100111
1111001

Above the table is created as per follow :

When Q2 =0 which is the present state and Q2‘=0 which is next state then T2 become 0 [As per excitation table, have a look ]
Similarly, if Q2 is 0 and Q2‘ is 1 then T2 becomes 1.
In a similar way, it goes on .

Step 3: After making the excitation table the next thing  to do is dig out the equation from the boolean algebra or K map for the design of the counter. So, for T1 and  T2we got 1, and Q1‘.Ci + Q1.Ci’

K-Map

 

 

For T2  Flip flop,

2 2Bbit 2Bup 2Bdown1

 

T2= Q1‘.Ci + Q1.Ci’

For TFlip flop,

2 2Bbit 2Bup 2Bdown2

 

T1=1

Step 4: Lastly according to the equation got from K map create the design for 2 bit synchronous up down counter.

 

2 2Bbit 2Bup 2Bdown

Related posts:

Design a 2 bit Synchronous down counter using T Flip flop?
Design a 2 bit Synchronous up counter using T Flip flop? 

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How to Find Product Of Sums or POS from Truth Table ? https://programmerbay.com/how-to-find-product-of-sums-from-truth-table/ https://programmerbay.com/how-to-find-product-of-sums-from-truth-table/#respond Tue, 10 May 2022 08:56:00 +0000 http://programmerbay.com/?p=3098

Product Of Sum or POS Form

POS stands for Product of Sum and totally opposite to SOP form . When an expression is expressed in a product of binary terms ( A term refers to a set of binary variables, where each binary variable is combined with an operation) called Maxterms than it is said to be Product of Sum.

In other words, An expression consisting only Maxterms is called Product of Sum. For  example, (A+B)(A’+B) is a POS expression.
[other concept Minterms, A.B+A’B’]

POS can be categorized in two forms :

– Canonical or Standard POS form: In this, each and every binary variable must have in each term. For example :- (A+B).(A’+B).

– Minimal POS form: In this, the standard POS expression is reduced up in the minimum possible expression.

product 2Bof 2Bsum

A Question can be asked in three ways:-

1) In the form Truth table
2) In the form of non-canonical Expression
3) In the of form of Boolean function

 For the given table, simplify it in POS expression

Or

Find POS from Truth Table

A B Y
0 0 0 (M0)
0 1 0 (M1)
1 0 1 (M2)
1 1 1 (M3)

 

Points to Remember :

  • Always consider low output (0)
  • In Product of Sum or POS, every term in the expression is refereed to Maxterm
  • A Maxterm is represented as M(Capital M)
  • Consider A’ =1, A=0




Step 1. Since there are 2 variables , so therefore there would be 2n combinations which is 22 =4.
We consider a low output as Maxterm . a Maxterm is denoted as M.
Y= M0+M1
Y = (A+B).(A+B’)                           :- It is in Canonical POS form

In Product of Sum each term is combined with AND operation and within each term, every variable combined with OR operation.

Step 2. Now narrow the founded expression down to minimal Product of Sume or POS form. In this, you should know rules of Boolean expression or K-map

Y= A+BB’                         :-  x+yz = (x+y)(x+z)
Y= A + 0                            :- x.x’ =0
Y= A

OR

Considering, A= 0, A’=1

product 2Bof 2Bsum 2B2 2Bvariable 2B



Y= A

A is your answer.

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Construct 3 to 8 decoder with truth table and logic gates https://programmerbay.com/construct-3-to-8-decoder-with-truth-table-and-logic-gates/ https://programmerbay.com/construct-3-to-8-decoder-with-truth-table-and-logic-gates/#respond Mon, 12 Oct 2020 18:16:00 +0000 http://programmerbay.com/?p=3108

Decoder is also a Combinational circuit which transforms given inputs to a maximum number of outputs (maximum outputs equal to 2n and n are given inputs ).

In other words, a decoder can be defined as a logic circuit that receives binary input and produces output corresponding to that very binary input.

A block diagram of decoder consists of n input lines, one or more enable inputs and 2n maximum number of output lines.

To construct a decoder, we require to know the number of all possible output lines that totally depends on the given input.

So, if n represents given input lines then possible output lines would be 2n.
Decoder with three inputs would give 8 outputs (n=2,2that is 8).

In this article, we’ll be going to design 3 to 8 decoder step by step.

Here are the steps to Construct 3 to 8 Decoder

Step 1. Now we know possible outputs for 3 inputs, so construct 3 to 8 decoder, having 3 input lines, a enable input and 8 output lines.

In the below diagram, given input represented as I2Iand I, all possible outputs named as  O0, O1, O2,O3O4, O5,O6 Oand a E were represented by Enable input.

With Enable input

3 2Bto 2B8 2Bdecoder 2BFlow2code.png

Without Enable input

new




Step 2. Now, it turns to construct the truth table for 3 to 8 decoder. E input can be considered as a control input.

Mean to say, If E equals to 0 then the decoder would be considered as disabled regardless of what inputs are,  If E equals to 1 then the decoder would work as per inputs.

Truth table without E input

InputsOutputs
I2I1I0O7O6O5O4O3O2O1O0
00000000001
00100000010
01000000100
01100001000
10000010000
10100100000
11001000000
11110000000

We can represent the following output as:

O= I0‘.I1.I2
O= I0.I1.I2

O= I0‘.I1.I2
O3 = I0.I1.I2
O4 = I0.I1.I2
O5 = I0.I1.I2
O6 = I0.I1.I2
O7 = I0.I1.I2


Truth table with E input

Inputs
Outputs
EI2I1I0O7O6O5O4O3O2O1O0
0---00000000
100000000001
100100000010
101000000100
101100001000
110000010000
110100100000
111001000000
111110000000

Step 3. With the help of the above expressions derived from the table, the circuit of a 3 to 8 decoder can be implemented.

Decoder Without E

3 2Bto 2B8 2Bdecoder 2Bwithout 2Bflow3code

Explanation:

In the above diagram, there were three input lines with their respective complements using Inverters. Each and every AND gate were holding three inputs from I1Iand Iand producing 8 outputs.

Decoder with E

 

3 2Bto 2B8 2Bwith 2Benable 2Bflow2code

Explanation:

In above diagram, there were three input lines along with their complements using Inverters. Each and every AND gate were holding four inputs from E, I1Iand Iand producing 8 outputs.

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Construct 4 to 1 Multiplexer Using Logic Gates https://programmerbay.com/construct-4-to-1-multiplexer-using-logic-gates/ https://programmerbay.com/construct-4-to-1-multiplexer-using-logic-gates/#respond Thu, 01 Oct 2020 04:50:00 +0000 http://programmerbay.com/?p=3110

A multiplexer is a Combinational circuit (it is a type of circuit whose output rely on the given inputs using various logic gates ) that takes multiple inputs and delivers only a single output. It consists input data lines, selection lines and a single output.

Multiplexer

To construct a 4 to 1 multiplexer, we need to know how many selection lines we required to create a MUX?

We require  n selection lines, where 2n represents total input lines and  n represents selection lines. (In this case, 22 that gives 4 input lines and 2 selection lines).

A multiplexer is often abbreviated as MUX or many to one circuit or parallel to serial circuit.

It is a data selector that provides the mechanism to select single binary information from many input lines and passes it to output line

Advantages of Multiplexer:

  • It is less costly and reduces transmission circuit complexity
  •  It can be used to implement many combinational circuits
  • It reduces number of wires

Applications of Multiplexer:

  • It is used in communication system i.e Satellite systems, telephone networks
  • It is used to read data from memory locations in computer memory

Types of Multiplexer
There are various types of multiplexers and few are given below:

  • 2:1 MUX
  • 4:1 MUX
  • 8:1 MUX
  • 16:1 MUX
  • 32:1 MUX

In this article, we’ll be discussion 4:1 MUX.

Here are the steps to design or construct 4 to 1 Multiplexer or 4:1 MUX using Logic Gates :

1) Now, make a diagram of multiplexer with 4 input lines, 2 selection lines and 1 output. In below diagram, A0 , A1 , A2 and A3 are input data lines, S0 and S1 are Selection lines and lastly one output line named Y.

 

MULTIPLEXER 2B4 2Bcross 2B1

2) This is how a truth table for 4 to 1 MUX looks like . According to the truth table, the output of the multiplexer fully depends on selection lines (binary data , 00,01,10 & 11) and one input would be selected from all the input data lines as the output.


Truth table

   Selection Lines    Output
S0S1Output
00A0
01A1
10A2
11A3

Above  table is created as per follow :

When S0 =0 and S1=0 , then A0 would be the output.
Similarly When S0 =0 and S1=1 , then A1 would be the output.

We can represent this by an expression.
Output = S0‘.S1‘A+ S0‘.S1A1+ S0.S1‘A2 + S0.S1 A3

3) In last step, design 4 to 1 multiplexer by using 4 AND gates and a single OR gate.
4 2Bto 2B1

Explanation:

In above diagram, there were two selection lines along with their respective complements using Inverters. Each and every AND gate were holding three inputs from S1, S0 and a particular input A. lastly, outputs of all AND gates became the input for OR gate and providing a single output.

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Difference Between Selective Repeat And Go-Back-N Sliding Window Protocol https://programmerbay.com/difference-between-selective-repeat-and-go-back-n-sliding-window-protocol/ https://programmerbay.com/difference-between-selective-repeat-and-go-back-n-sliding-window-protocol/#respond Fri, 22 May 2020 09:26:38 +0000 https://www.programmerbay.com/?p=2629 Go-Back-N protocol and Selective-Repeat protocol are sliding window protocols used to deal with errors that is occurred during data transmission.

sliding window protocols
The main difference between them is, Go-Back-N protocol retransmits all the frames starting from the damaged or corrupted frame, whereas Selective Repeat protocol only retransmits frames that are damaged.

Difference between Selective Repeat and Go-Back- N sliding window protocol:

Go-Back-N Sliding Window Protocol Selective repeat Sliding Window protocol
It acts by retransmitting all the frames in the particular order after a damaged or corrupted frame is encounteredIt acts by retransmitting only those frames which are damaged or corrupted while transmission
It uses cumulative acknowledgements It uses independent acknowledgement
In this protocol, there is a great amount of wastage of the bandwidth, if there is a high error rate in the transmissionIn this protocol, there is less wastage as compared to Go-Back-N sliding window protocol in retransmission of frames
In this, there is absolutely no need for sorting the sender or the receiver sideIn this protocol, there is a need for the sorting of frames that too on the receiver side to maintain the proper sequence of frames
Sliding window size of receiver is 1. For sender, it is NSliding window size of receiver is N. For sender, it is same as receiver which is N
It is fairly less complicated than other protocolsIt is slightly more complicated solely because it uses strategies, logics, etc. which is not present in all protocols
The receiver does not store any frame that is received after encountering the damaged frame, till the damaged frame is retransmittedThe receiver stores the frames that are received after encountering the damaged frame in a buffer, till the damaged frame is resent by the sender
It is more frequently used as compared to Selective repeat Sliding WindowIt is less frequently used as compared to Go-Back-N

 

Selective Repeat sliding window protocol:

Selective repeat is one of the sliding window protocols which is essentially responsible for detecting and correcting the error caused in the data link layer.

The Selective repeat protocol basically only retransmits the damaged or lost frame.

The retransmitted frame in the selective repeat protocol is always received out of sequence.

 

Go-back-N sliding window protocol:

Go-back-N is also one of the sliding window protocols. This protocol mechanism is essentially used to control and detect the errors occurring in the data link layer.

During the data transmission between the sender and the receiver; if the acknowledgement is lost or the frame has been damaged then the sender has to resend all the frames starting from the damaged or corrupted frame.

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Difference between Synchronous and Asynchronous transmission https://programmerbay.com/difference-between-synchronous-and-asynchronous-transmission/ https://programmerbay.com/difference-between-synchronous-and-asynchronous-transmission/#respond Wed, 05 Feb 2020 17:33:36 +0000 https://www.programmerbay.com/?p=2467 The transmission that emphasises on transmitting data bit by bit is known as Serial Data Transmission. This serial transmission is of two types:

  1. Synchronous data transmission
  2. Asynchronous data transmission

synchronous transimission and asynchronous transmission

Both are data transmission methods and both have their own significance.

The major difference between them is, synchronous transmission maintains an external clock to make sender and receiver synchronised before transferring data, whereas, the asynchronous transmission uses start and stop bits to identify the correct order of data before transmission starts.

Difference between Synchronous and Asynchronous transmission

SYNCHRONOUS TRANSMISSIONASYNCHRONOUS TRANSMISSION
In Synchronous data transmission, the data is sent in the form of frames or blocksIn this data transmission, the data is transmitted in the form of a Character or Byte
Synchronous data transmission is faster as compared to Asynchronous data transmissionAsynchronous data transmission is comparatively slower than Synchronous data transmission
A constant time interval is followedThere is no time interval to be followed
It is very expensiveAsynchronous data transmission is quite economical
This type of transmission can be implemented for data transmission through both hardware and softwareThis type of transmission can be implemented for data transmission through hardware only
If we take synchronous transmission into consideration then, in this type of data transmission there is an urgent requirement for both the sender and receiver to have a synchronized clockIf we take asynchronous transmission into consideration then, in this type of data transmission there is no need for the sender or receiver to have a synchronized clock
No gap between data is existGap between data is exist
Chat rooms and telephonic conversations are some examplesE-mails and Letters are some examples

Synchronous Data Transmission

Synchronous refers to “appearing at same time”.
Similarly, throughout the transmission both sender and receiver are synchronised.

The type of transmission in which there is a continuous stream of data signals coupled with time-based signals for an efficient data transfer is called Synchronous Data transmission. It provides full duplex type transmission to deliver data frames.

This transmission is done to ensure that the transmitters, as well as the receiver, are in coordination with each other.

Synchronous Data Transmission

In case of synchronous transmission, there is greater need to firstly have synchronized clock with both the sender as well as the receiver before actual data transmission.

It uses an external clock in order to ensure both sender and receiver are synchronised. Both uses that particular common clock. It maintains a fixed time interval to transmit data frames.

It is suitable for delivering a large amount of data. These data bytes are followed by a special character called ‘syn’ which is used to make the connection synchronised.

Asynchronous Data Transmission

The type of transmission in which there is a voluntary start bit is sent to mark the beginning of a data transfer is called Asynchronous data transmission.

In this transmission, the whole process of data transfer is governed by the start and stop bits.

Asynchronous Data Transmission

There is no need to have synchronized clocks but there is an addition of the parity bit to the actual data before the transmission happens.

 

In this type of transmission, data bytes are transmitted bit by bit commonly having 8 bits of characters with the special bits. It provides half-duplex type transmission to deliver data bytes.

To identify the correct order of a sequence of data, these two special bits are used.

The two bits is stop bit represented by 1 and start bit by 0, also known as partial bits. To achieve this type of transmission, stop-bit and start-bit is sent along with data bytes through the transmission medium.

 

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Difference between user mode and kernel mode https://programmerbay.com/difference-between-kernel-and-user-mode/ https://programmerbay.com/difference-between-kernel-and-user-mode/#respond Mon, 01 Apr 2019 16:41:42 +0000 https://www.programmerbay.com/?p=2641 An operating system can have various modes of operation and these modes define standardised instructions for deciding what resources can be accessed, limit memory access and more in order to protect data and provide system security.

There are two types of modes, User Mode and Kernel Mode. A kernel mode is also known as supervisor mode.

kernel mode and user mode

User mode

It has restricted access to the resources. CPU has restrictions, therefore, it can have only access to limited instructions and memory. Utility applications such as text editor, media player are run in this mode.

When an application or program is executed, its initial state and operation mode are loaded on stack. At this point, CPU starts executing the program in this particular mode. Interrupts and traps are used to signal  or flag the CPU to switch back to Kernel mode and do the essential tasks by storing the current state of the user program to the stack again. After completing it, CPU resumes the program from where it left.

Kernel Mode

It has full access to memory, I/O and other resources. In this, CPU can execute any instructions and have full access to underlying hardware. The core functionalities of the operating system always run in Kernel mode.

Having these authorities, processes using this mode have full rights to access resources, allowing them read/write to the storage media, enable and disable hardware and more. Difference between Kernel Mode and User Mode :

BasisKernel ModeUser Mode
PermissionUnrestricted and full permissions to access the system's hardwareRestricted and limited permissions to access the system's hardware
Memory referenceIt can reference to both the memory spacesIt can only reference to memory space that is dedicated to user mode
AccessOnly core functionality can be allowed to operate in this very modeUser applications can access this mode for a particular system and is allowed to operate in this particular mode
System crashFatal and increases the complexityRecoverable and can simply restart the session
Also Known Privileged mode or Supervisor mode Restricted mode

Key Differences:

  1. The mode in which there is an unconditional, unrestricted and full permission to access the system’s hardware by the current executing piece of code is known as the kernel mode. The mode in which there is no means of accessing the system’s hardware directly by the current piece of code is also known as the user mode.
  2. The kernel mode is a very powerful and impactful mode which means that it can refer to any memory block of the system and can also orders to execute an instruction to the CPU. The user mode is standardized and normal viewing mode which means that it cannot reference to any memory block or execute any information on its own as it requires some Application Protocol Interface (API) to do these tasks.
  1. The kernel mode is the most unrestricted and candid mode that a system can have which means that only the trustable sources can be allowed to operate in this very mode. The user mode is more like a generic mode that can have, which means that any user can access this mode for a particular system and is allowed to operate in this particular mode.
  1. As the kernel mode is very important and candid this means that if the system crashes in this mode then it could be very fatal and increases the complexity. As the user mode is quite general and user-friendly this means that even if the system crashes in this mode then it is not fatal at all and can simply restart the session.
  1. The kernel mode is very crucial to the system as well as the system programmer so everything that runs easily runs on your PC might not run here because its purpose is to employ hardware for a particular task. The user mode is user friendly space where all the general code will definitely execute.

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Difference Between Subnetting And Supernetting https://programmerbay.com/difference-between-subnetting-and-supernetting/ https://programmerbay.com/difference-between-subnetting-and-supernetting/#respond Fri, 22 Mar 2019 10:05:57 +0000 https://www.programmerbay.com/?p=2633 A network can be defined as a group of two or more computers that can communicate with each other in order to share data and resources. A device in the network is uniquely identified by IP addresses.

Subnetting and Supernetting are the two ways to organise these IP addresses. The main difference between them is, Subnetting is a technique of dividing a network into smaller ones, on other hand, Supernetting is a technique of combining several networks to a large network. Both techniques has their own advantages and disadvantages

Difference Between Subnetting And Supernetting:

BasisSubnetting Supernetting
DefinitionIt is a technique to split a network into smaller subnetworksIt is the technique of merging various networks to form one single network
Number of addresses’s bits DecreaseIncrease
Movement of Mask bits Right of the default maskLeft of the default mask
Designed byVariable-Length Subnet MaskingClassless Inter-domain Masking
ObjectiveDeals with network congestion and increase performanceReducing the number of entries in a routing table that simplify the routing process

 

SUBNETTING

The technique of dividing the Physical network into various smaller subnetworks which are essentially logical and known as Subnetting. “Subnets” is the nomenclature given to these smaller and downsized subnetworks. There is a combination of the host segment and the network segment to form the IP address of these subnetworks. The major objective of the subnetting is to convert all the host related bits into the network bits.

SUPERNETTING

The technique which is completely opposite to the process of Subnetting; this means that various other networks are merged and joined to form one single network, this is known as Supernetting.

There are various other names of Supernetting like aggregation and Router summarization. The major objective of Supernetting is to convert all the network related bits into the host bits.

 

Key Differences:

  1. The subnetting is the technique to divide the network into smaller subnetworks. The Supernetting is the technique of uniting various other networks to form one single network.
  1. In subnetting, the network address’s numbers of bits are dramatically increased whereas, in Supernetting the host address’s numbers of bits are dramatically increased.
  1. In subnetting, the movement of the masked bits is towards the right of the default mask. While, in Supernetting the movement of the masked bits is towards the left of the default mask.
  1. In subnetting, the technique of masking used is Variable-Length Subnet Masking. In Supernetting, the technique of masking used is Classless Interdomain Masking.

 

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Difference Between Hub And Switch https://programmerbay.com/difference-between-hub-and-switch/ https://programmerbay.com/difference-between-hub-and-switch/#respond Fri, 15 Mar 2019 08:24:01 +0000 https://www.programmerbay.com/?p=2625 Hub and Switch both are networking devices used to communicate within an Local Area Network. Switch is always preferred over Hub. The major difference between them is, Hub is not capable of identifying the destination of a receiver, therefore, it broadcasts the data to all connected devices, on the other hand, Switch is capable of identifying the MAC addresses of all connecting devices, therefore, it only delivers a data packet to the respective receiver.

Difference between Hub and Switch:

BasisHubSwitch
Layer Physical LayerData Link Layer
FunctionalityIt is used to connect various devices on an internal networkIt is used to connect various devices on an internal network and capable of storing mac addresses and delivering data to the intended receiver
Data transmission formElectrical impulses or bitsframes or packets
Ports4 to12 ports24 to 48 ports
Transmission ApproachBroadcastUnicast, Multicast and Broadcast
Transmission ModeHalf duplexFull duplex
Packet FilteringNot supportedSupported
Mac AddressNot Capable of storing Mac addressCapable of storing Mac address
IntelligentNoYes
Collision Domain ( Part of network where collision can occur )Exactly oneEach and every ports have different collision domains

What is Hub ?

switch 23321 1280
It is a networking device that is used to connect various devices on an internal network. It provides ports for various devices which can be used to connect with the help of Ethernet cables. It is not capable of filtering data packets and transmuting  data to respective destination. When a data packet is received from one of the port, it is copied and broadcast to all the connecting devices, exposing that data to  others.

It results in unnecessary traffic on network and creates security issues. It can only identify when a device is connected to a hub.

 

What is Switch?

computer 158777 640
It is similar to hub, the only thing that makes it different from hub is, a switch is intelligent. It can read physical addresses or mac address of a connected devices and stored it in a table. Therefore, when a data packet is received from on of the port, it is only delivered to actual receiver’s port.

 

 

Key Differences:

1.LAYER

Hub works in the PHYSICAL LAYER and the hubs are often termed as the Layer 1 devices of the OSI model.

A switch works in the DATA LINK LAYER and the switch is often termed as the Layer 2 device of the OSI model.

2. FUNCTION

The main function of a hub is to connect a network which consists of personal computers together. This can be accomplished by the use of a central hub.

The switch has various functions ranging from connecting devices, managing the VLAN (Virtual LAN) security and also manages ports.

3. DATA TRANSMISSION FORM

In the case of a hub, the data is sent in the form of electrical impulses or bits.

In the case of a switch, frames are used for data transmission in L2 switch and packets are used for data transmission in L3 switch.

4. PORTS

A hub has about 4/12 ports.

A switch is considered as a Multi-port bridge, that is why it has 24/48 ports.

5. TRANSMISSION TYPE

A hub follows broadcast transmission.

A switch  follows unicast, multicast as well as broadcast transmission.

6. DEVICE TYPE

A hub is also known as a Passive device, which is without any software.

A switch is also known as an Active device, which is with software and also networking device.

7. TRANSMISSION MODE

In a hub, the basic transmission mode which is followed is a half duplex.

In a switch, the basic transmission mode which is followed is full/half duplex.

8. SPEED

The hub device can offer you a speed which is about 10Mbps.

The switch device can offer you speeds ranging from 10-100 Mbps and it can even offer a speed of 1 Gbps.

 

 

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Construct 2 to 4 decoder with truth table and logic diagram https://programmerbay.com/construct-2-to-4-decoder-with-truth-table-and-logic-diagram/ https://programmerbay.com/construct-2-to-4-decoder-with-truth-table-and-logic-diagram/#respond Sun, 01 Oct 2017 16:57:00 +0000 http://programmerbay.com/?p=3109

Just as Multiplexer, Decoder is also a Combinational circuit  which transforms given inputs to maximum number of outputs(maximum outputs equal to 2n and n are given inputs ).
A block diagram of decoder consists input lines, one or more enable inputs and maximum number of output lines.
To construct a decoder, we require to know the number of all possible output lines that totally depends on the given input.
So, if  n represents given input lines then possible output lines would be 2n .
Decoder with two inputs would give 4 outputs (n=2,2that is 4).

Step 1. Now we know possible outputs for 2 inputs, so construct 2 to 4 decoder , having 2 input lines, a enable input and 4 output lines. In the below diagram, given input represented as Iand I, all possible outputs named as  O0, O1, O2, & Oand a E were represented by Enable input.

With Enable input

2 2BTO 2B1 2Bdecoder

 

Without Enable input

2 2BTO 2B1 2Bdecoder 1

Step 2. Now, it turns to construct the truth table for 2 to 4 decoder. E input can be considered as the control input. Mean to say, If E equals to 0 then the decoder would be considered as disabled regardless of what inputs are,  If E equals to 1 then the decoder would work as per inputs.

Truth table without E input

 

Inputs Outputs
I1 I0 O3 O2 O1 O0
0 0 0 0 0 1
0 1 0 0 1 0
1 0 0 1 0 0
1 1 1 0 0 0

As per the above table, I0 would give Oand O3 and I1 would give O1 and O3.
We can represent the following output as:

O= I0‘.I1
 O= I0.I1

 O= I0‘.I1
 O3 = I0.I1


Truth table with E input

Inputs Outputs
E I1 I0 O3 O2 O1 O0
0 0 0 0 0
1 0 0 0 0 0 1
1 0 1 0 0 1 0
1 1 0 0 1 0 0
1 1 1 1 0 0 0

Decoder with E

2 2Bto 2Bdecoder 2Bdiagram 2Bwith 2BE

 

Explanation:

In above diagram, there were two input lines along with their complements using Inverters. Each and every AND gate were holding three inputs from E, Iand Iand producing 4 outputs.

Decoder Without E

2 2Bto 2Bdecoder 2Bdiagram

Explanation:

In above diagram, there were two input lines with their respective complements using Inverters. Each and every AND gate were holding two inputs from Iand Iand producing 4 outputs.

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